quic/qbox
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mii.h
1/*
2 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
3 * Author: GreenSocs 2022
4 *
5 * SPDX-License-Identifier: BSD-3-Clause
6 */
7
8#ifndef _MII_H_
9#define _MII_H_
10
11/* Generic MII registers. */
12#define MII_BMCR 0x00 /* Basic mode control register */
13#define MII_BMSR 0x01 /* Basic mode status register */
14#define MII_PHYSID1 0x02 /* PHYS ID 1 */
15#define MII_PHYSID2 0x03 /* PHYS ID 2 */
16#define MII_ADVERTISE 0x04 /* Advertisement control reg */
17#define MII_LPA 0x05 /* Link partner ability reg */
18#define MII_EXPANSION 0x06 /* Expansion register */
19#define MII_CTRL1000 0x09 /* 1000BASE-T control */
20#define MII_STAT1000 0x0a /* 1000BASE-T status */
21#define MII_MMD_CTRL 0x0d /* MMD Access Control Register */
22#define MII_MMD_DATA 0x0e /* MMD Access Data Register */
23#define MII_ESTATUS 0x0f /* Extended Status */
24#define MII_DCOUNTER 0x12 /* Disconnect counter */
25#define MII_FCSCOUNTER 0x13 /* False carrier counter */
26#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
27#define MII_RERRCOUNTER 0x15 /* Receive error counter */
28#define MII_SREVISION 0x16 /* Silicon revision */
29#define MII_RESV1 0x17 /* Reserved... */
30#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
31#define MII_PHYADDR 0x19 /* PHY address */
32#define MII_RESV2 0x1a /* Reserved... */
33#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
34#define MII_NCONFIG 0x1c /* Network interface config */
35
36/* Basic mode control register. */
37#define BMCR_RESV 0x003f /* Unused... */
38#define BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
39#define BMCR_CTST 0x0080 /* Collision test */
40#define BMCR_FULLDPLX 0x0100 /* Full duplex */
41#define BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
42#define BMCR_ISOLATE 0x0400 /* Isolate data paths from MII */
43#define BMCR_PDOWN 0x0800 /* Enable low power state */
44#define BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
45#define BMCR_SPEED100 0x2000 /* Select 100Mbps */
46#define BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
47#define BMCR_RESET 0x8000 /* Reset to default state */
48
49/* Basic mode status register. */
50#define BMSR_ERCAP 0x0001 /* Ext-reg capability */
51#define BMSR_JCD 0x0002 /* Jabber detected */
52#define BMSR_LSTATUS 0x0004 /* Link status */
53#define BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
54#define BMSR_RFAULT 0x0010 /* Remote fault detected */
55#define BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
56#define BMSR_RESV 0x00c0 /* Unused... */
57#define BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
58#define BMSR_100HALF2 0x0200 /* Can do 100BASE-T2 HDX */
59#define BMSR_100FULL2 0x0400 /* Can do 100BASE-T2 FDX */
60#define BMSR_10HALF 0x0800 /* Can do 10mbps, half-duplex */
61#define BMSR_10FULL 0x1000 /* Can do 10mbps, full-duplex */
62#define BMSR_100HALF 0x2000 /* Can do 100mbps, half-duplex */
63#define BMSR_100FULL 0x4000 /* Can do 100mbps, full-duplex */
64#define BMSR_100BASE4 0x8000 /* Can do 100mbps, 4k packets */
65
66/* Advertisement control register. */
67#define ADVERTISE_SLCT 0x001f /* Selector bits */
68#define ADVERTISE_CSMA 0x0001 /* Only selector supported */
69#define ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
70#define ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
71#define ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
72#define ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
73#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
74#define ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
75#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
76#define ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
77#define ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
78#define ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
79#define ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
80#define ADVERTISE_RESV 0x1000 /* Unused... */
81#define ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
82#define ADVERTISE_LPACK 0x4000 /* Ack link partners response */
83#define ADVERTISE_NPAGE 0x8000 /* Next page bit */
84
85#define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | ADVERTISE_CSMA)
86#define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | ADVERTISE_100HALF | ADVERTISE_100FULL)
87
88/* Link partner ability register. */
89#define LPA_SLCT 0x001f /* Same as advertise selector */
90#define LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
91#define LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
92#define LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
93#define LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
94#define LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
95#define LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
96#define LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
97#define LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym */
98#define LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
99#define LPA_PAUSE_CAP 0x0400 /* Can pause */
100#define LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
101#define LPA_RESV 0x1000 /* Unused... */
102#define LPA_RFAULT 0x2000 /* Link partner faulted */
103#define LPA_LPACK 0x4000 /* Link partner acked us */
104#define LPA_NPAGE 0x8000 /* Next page bit */
105
106#define LPA_DUPLEX (LPA_10FULL | LPA_100FULL)
107#define LPA_100 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
108
109#define SLCT_IEEE802_3 0x0001
110
111#endif