quic/qbox
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riscv64.h
1/*
2 * This file is part of libqbox
3 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All Rights Reserved.
4 * Author: GreenSocs 2021
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9#pragma once
10
11#include <string>
12#include <functional>
13
14#include <libqemu-cxx/target/riscv.h>
15
16#include <libgssync.h>
17#include <module_factory_registery.h>
18
19#include <cpu.h>
20
21class QemuCpuRiscv64 : public QemuCpu
22{
23protected:
24 uint64_t m_hartid;
25 gs::async_event m_irq_ev;
26
27 void mip_update_cb(uint32_t value)
28 {
29 if (value) {
30 m_irq_ev.notify();
31 }
32 }
33
34public:
35 QemuCpuRiscv64(const sc_core::sc_module_name& name, QemuInstance& inst, const char* model, uint64_t hartid)
36 : QemuCpu(name, inst, std::string(model) + "-riscv")
37 , m_hartid(hartid)
38 /*
39 * We have no choice but to attach-suspend here. This is fixable but
40 * non-trivial. It means that the SystemC kernel will never starve...
41 */
42 , m_irq_ev(true)
43 {
44 m_external_ev |= m_irq_ev;
45 }
46
47 void before_end_of_elaboration()
48 {
49 QemuCpu::before_end_of_elaboration();
50
51 qemu::CpuRiscv64 cpu(get_qemu_dev());
52 cpu.set_prop_int("hartid", m_hartid);
53 cpu.set_mip_update_callback(std::bind(&QemuCpuRiscv64::mip_update_cb, this, std::placeholders::_1));
54 }
55};
56
58{
59public:
60 cpu_riscv64(const sc_core::sc_module_name& name, sc_core::sc_object* o, uint64_t hartid)
61 : cpu_riscv64(name, *(dynamic_cast<QemuInstance*>(o)), hartid)
62 {
63 }
64 cpu_riscv64(const sc_core::sc_module_name& n, QemuInstance& inst, uint64_t hartid)
65 : QemuCpuRiscv64(n, inst, "rv64", hartid)
66 {
67 }
68};
69
70extern "C" void module_register();
Definition riscv64.h:22
Definition cpu.h:30
This class encapsulates a libqemu-cxx qemu::LibQemu instance. It handles QEMU parameters and instance...
Definition qemu-instance.h:89
Definition target.h:160
Definition riscv64.h:58
Definition async_event.h:22
Definition riscv.h:37