25    cci::cci_broker_handle m_broker;
 
   29    static constexpr qemu::Target ARCH = qemu::Target::HEXAGON;
 
   30    sc_core::sc_vector<QemuTargetSignalSocket> irq_in;
 
   32    qemu_cpu_hexagon(
const sc_core::sc_module_name& name, sc_core::sc_object* 
o1, sc_core::sc_object* 
o2)
 
   37        : 
QemuCpu(name, inst, 
"v67-hexagon")
 
   38        , m_broker(cci::cci_get_broker())
 
   40        , p_cfgbase(
"config_table_addr", 0xffffffffULL, 
"config table address")
 
   41        , p_l2vic_base_addr(
"l2vic_base_addr", 0xffffffffULL, 
"l2vic base address")
 
   42        , p_qtimer_base_addr(
"qtimer_base_addr", 0xffffffffULL, 
"qtimer base address")
 
   43        , p_vp_mode(
"vp_mode", 
true, 
"override the vp_mode for testing")
 
   44        , p_semihosting(
"enable_semihosting", 
false, 
"enable semihosting for debugging/testing")
 
   45        , p_dsp_arch(
"dsp_arch", 
"v68", 
"DSP arch")
 
   46        , p_start_powered_off(
"start_powered_off", 
false,
 
   47                              "Start and reset the CPU " 
   48                              "in powered-off state")
 
   49        , p_sched_limit(
"sched_limit", 
true, 
"use sched limit")
 
   50        , p_paranoid(
"paranoid_commit_state", 
false, 
"enable per-packet checks")
 
   51        , p_subsystem_id(
"subsystem_id", 0, 
"subsystem id")
 
   52        , p_hexagon_num_threads(
"hexagon_num_threads", 8,
 
   53                                "number of hexagon threads") 
 
   54        , p_isdben_trusted(
"isdben_trusted", 
true, 
"isdben trusted")
 
   55        , p_isdben_secure(
"isdben_secure", 
true, 
"isdben secure")
 
   56        , p_coproc(
"coproc", 
"", 
"coproc")
 
   57        , p_cmdline(
"cmdline", 
"", 
"cmdline")
 
   58        , p_vtcm_base_addr(
"vtcm_base_addr", 0, 
"vtcm base address")
 
   59        , p_vtcm_size_kb(
"vtcm_size_kb", 0, 
"vtcm size in kb")
 
   60        , p_num_coproc_instance(
"num_coproc_instance", 0, 
"number of coproc instances")
 
   61        , p_hvx_contexts(
"hvx_contexts", 0, 
"number of HVX contexts")
 
   62        , p_num_tlbs(
"num_tlbs", 0, 
"number of Joint TLB entries")
 
   63        , p_num_dma_tlbs(
"num_dma_tlbs", 0, 
"number of DMA TLB entries")
 
   70        for (
int i = 0; 
i < irq_in.size(); ++
i) {
 
   71            m_external_ev |= irq_in[
i]->default_event();
 
   75    void before_end_of_elaboration()
 override 
   77        const std::string 
dsp_arch = p_dsp_arch.get_value();
 
   78        set_qom_type(
dsp_arch + 
"-hexagon-cpu");
 
   80        QemuCpu::before_end_of_elaboration();
 
   83        qemu::CpuHexagon::Rev_t 
dsp_rev = qemu::CpuHexagon::parse_dsp_arch(
dsp_arch);
 
   84        if (
dsp_rev == qemu::CpuHexagon::unknown_rev) {
 
   88        cpu.set_prop_int(
"l2vic-base-addr", p_l2vic_base_addr);
 
   89        cpu.set_prop_bool(
"start-powered-off", p_start_powered_off);
 
   90        cpu.set_prop_bool(
"sched-limit", p_sched_limit);
 
   91        cpu.set_prop_bool(
"virtual-platform-mode", p_vp_mode);
 
   92        cpu.set_prop_bool(
"enable-semihosting", p_semihosting);
 
   93        cpu.set_prop_bool(
"paranoid-commit-state", p_paranoid);
 
   94        cpu.set_prop_int(
"subsystem-id", p_subsystem_id);
 
   95        cpu.set_prop_int(
"thread-count", p_hexagon_num_threads);
 
   96        cpu.set_prop_str(
"coproc", p_coproc.get_value().data());
 
   97        cpu.set_prop_str(
"cmdline", p_cmdline.get_value().data());
 
   98        cpu.set_prop_int(
"vtcm-base-addr", p_vtcm_base_addr);
 
   99        cpu.set_prop_int(
"vtcm-size-kb", p_vtcm_size_kb);
 
  100        cpu.set_prop_int(
"num-coproc-instance", p_num_coproc_instance);
 
  101        cpu.set_prop_int(
"hvx-contexts", p_hvx_contexts);
 
  102        if (!p_num_tlbs.is_default_value()) {
 
  103            cpu.set_prop_int(
"jtlb-entries", p_num_tlbs);
 
  105        if (!p_num_dma_tlbs.is_default_value()) {
 
  106            cpu.set_prop_int(
"dma-jtlb-entries", p_num_dma_tlbs);
 
  110            p_hex_greg->before_end_of_elaboration();
 
  119    void end_of_elaboration()
 override 
  121        QemuCpu::end_of_elaboration();
 
  123        get_cpu_hexagon().register_reset();
 
  125        for (
int i = 0; 
i < irq_in.size(); ++
i) {
 
  126            irq_in[
i].init(m_dev, 
i);
 
  131    cci::cci_param<uint64_t> p_cfgbase;
 
  132    cci::cci_param<uint32_t> p_l2vic_base_addr;
 
  133    cci::cci_param<uint32_t> p_qtimer_base_addr;
 
  134    cci::cci_param<bool> p_vp_mode;
 
  135    cci::cci_param<bool> p_semihosting;
 
  136    cci::cci_param<bool> p_start_powered_off;
 
  137    cci::cci_param<bool> p_sched_limit;
 
  138    cci::cci_param<bool> p_paranoid;
 
  139    cci::cci_param<std::string> p_dsp_arch;
 
  140    cci::cci_param<uint32_t> p_subsystem_id;
 
  141    cci::cci_param<uint32_t> p_hexagon_num_threads;
 
  142    cci::cci_param<bool> p_isdben_trusted;
 
  143    cci::cci_param<bool> p_isdben_secure;
 
  144    cci::cci_param<std::string> p_coproc;
 
  145    cci::cci_param<std::string> p_cmdline;
 
  146    cci::cci_param<uint64_t> p_vtcm_base_addr;
 
  147    cci::cci_param<uint32_t> p_vtcm_size_kb;
 
  148    cci::cci_param<uint32_t> p_num_coproc_instance;
 
  149    cci::cci_param<uint32_t> p_hvx_contexts;
 
  150    cci::cci_param<uint32_t> p_num_tlbs;
 
  151    cci::cci_param<uint32_t> p_num_dma_tlbs;